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Luca Ciccarelli: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Andrea Lodi, Luca Ciccarelli, Claudio Mucci, Roberto Giansante, Andrea Cappelli, Mario Toma
    An Embedded Reconfigurable Datapath for SoC. [Citation Graph (0, 0)][DBLP]
    FCCM, 2005, pp:303-304 [Conf]
  2. Andrea Lodi, Luca Ciccarelli, Roberto Giansante
    Combining low-leakage techniques for FPGA routing design. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:208-214 [Conf]
  3. Andrea Lodi, Roberto Giansante, Carlo Chiesa, Luca Ciccarelli, Mario Toma, Fabio Campi
    Routing architecture for multi-context FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:246- [Conf]
  4. Andrea Lodi, Roberto Giansante, Carlo Chiesa, Luca Ciccarelli, Fabio Campi, Mario Toma
    Compact Buffered Routing Architecture. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:179-188 [Conf]
  5. Andrea Lodi, Luca Ciccarelli, Andrea Cappelli, Fabio Campi, Mario Toma
    Decoder-Based Multi-Context Interconnect Architecture. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:231-233 [Conf]
  6. Fabio Campi, Antonio Deledda, Matteo Pizzotti, Luca Ciccarelli, Pier Luigi Rolandi, Claudio Mucci, Andrea Lodi, Arseni Vitkovski, Luca Vanzolini
    A dynamically adaptive DSP for heterogeneous reconfigurable platforms. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:9-14 [Conf]
  7. Andrea Lodi, Claudio Mucci, Massimo Bocchi, Andrea Cappelli, Mario de Dominicis, Luca Ciccarelli
    A Multi-Context Pipelined Array for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-8 [Conf]

  8. Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array. [Citation Graph (, )][DBLP]

  9. Sustainable (re-) configurable solutions for the high volume SoC market. [Citation Graph (, )][DBLP]

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