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J. Greg Nash: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. J. Greg Nash
    Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:299-300 [Conf]
  2. J. Greg Nash
    Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2005, pp:305-306 [Conf]
  3. D. B. Shu, J. Greg Nash, K. Kim
    Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:216-223 [Conf]
  4. J. Greg Nash, Siegfried Hansen
    Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:2, pp:129-137 [Journal]

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