The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Benjamin Ylvisaker: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Herman Schmit, Benjamin A. Levine, Benjamin Ylvisaker
    Queue Machines: Hardware Compilation in Hardware. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:152-0 [Conf]
  2. Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
    A Type Architecture for Hybrid Micro-Parallel Computers. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:99-110 [Conf]
  3. Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
    A type architecture for hybrid micro-parallel computers. [Citation Graph (0, 0)][DBLP]
    FPGA, 2006, pp:227- [Conf]

  4. SPR: an architecture-adaptive CGRA mapping tool. [Citation Graph (, )][DBLP]


  5. Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002