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Publications of Author

1. Arun Patel, Christopher A. Madill, Manuel Saldaña, Chris Comis, Regis Pomes, Paul Chow
   A Scalable FPGA-based Multiprocessor. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:111-120 [Conf]
   
2. Manuel Saldaña, Lesley Shannon, Paul Chow
   The routability of multiprocessor network topologies in FPGAs. [Citation Graph (0, 0)][DBLP]
   FPGA, 2006, pp:232- [Conf]
   
3. Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
   Designing an FPGA SoC Using a Standardized IP Block Interface. [Citation Graph (0, 0)][DBLP]
   FPT, 2005, pp:341-342 [Conf]
   
4. Manuel Saldaña, Lesley Shannon, Paul Chow
   The routability of multiprocessor network topologies in FPGAs. [Citation Graph (0, 0)][DBLP]
   SLIP, 2006, pp:49-56 [Conf]
   
5. Manuel Saldaña, Paul Chow
   TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-6 [Conf]
   
6. Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
   A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-6 [Conf]
   
7. Manuel Saldaña, Lesley Shannon, Jia Shuo Yue, Sikang Bian, John Craig, Paul Chow
   Routability of Network Topologies in FPGAs. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:8, pp:948-951 [Journal]
   
8. 
   A Message-Passing Hardware/Software Co-simulation Environment to Aid in Reconfigurable Computing Design Using TMD-MPI. [Citation Graph (, )][DBLP]