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Publications of Author

1. Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier
   Template-Based Generation of Streaming Accelators from a High Level Presentation. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:345-346 [Conf]
   
2. Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
   Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:325-326 [Conf]
   
3. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos, George D. Stamoulis
   Energy and Performance Improvements in Microprocessor Design Using a Loop Cache. [Citation Graph (0, 0)][DBLP]
   ICCD, 1999, pp:378-383 [Conf]
   
4. Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier
   FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2006, pp:- [Conf]
   
5. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos
   An analytical, transistor-level energy model for SRAM-based caches. [Citation Graph (0, 0)][DBLP]
   ISCAS (6), 1999, pp:198-201 [Conf]
   
6. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos
   Using dynamic cache management techniques to reduce energy in a high-performance processor. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1999, pp:64-69 [Conf]
   
7. Ibrahim N. Hajj, George D. Stamoulis, Nikolaos Bellas, Constantine D. Polychronopoulos
   Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1998, pp:70-75 [Conf]
   
8. Georgios I. Stamoulis, Maria G. Koziri, Ioannis Katsavounidis, Nikolaos Bellas
   A Low - Power VLSI Architecture for Intra Prediction in H.264. [Citation Graph (0, 0)][DBLP]
   Panhellenic Conference on Informatics, 2005, pp:633-640 [Conf]
   
9. Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
   Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-4 [Conf]
   
10. Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier
    An Architectural Framework for Automated Streaming Kernel Selection. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-7 [Conf]
    
11. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos
    Using dynamic cache management techniques to reduce energy in general purpose processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:6, pp:693-708 [Journal]
    
12. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos, G. Stamoulis
    Architectural and compiler techniques for energy reduction in high-performance microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:3, pp:317-326 [Journal]
    
13. 
    Real-Time Fisheye Lens Distortion Correction Using Automatically Generated Streaming Accelerators. [Citation Graph (, )][DBLP]
    
    
14. 
    Proteus: An architectural synthesis tool based on the stream programming paradigm. [Citation Graph (, )][DBLP]
    
    
15. 
    An Image Processing Pipeline with Digital Compensation of Low Cost Optics for Mobile Telephony. [Citation Graph (, )][DBLP]
    
    
16. 
    Mapping and optimization of the AVS video decoder on a high performance chip multiprocessor. [Citation Graph (, )][DBLP]
    
    
17. 
    Implementation of a wide-angle lens distortion correction algorithm on the cell broadband engine. [Citation Graph (, )][DBLP]