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Kenji Toda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
    Highly Efficient String Matching Circuit for IDS with FPGA. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:285-286 [Conf]
  2. Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba
    EM-3: A Lisp-Based Data-Driven Machine. [Citation Graph (0, 0)][DBLP]
    FGCS, 1984, pp:524-532 [Conf]
  3. Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba
    DBCL: Data-Flow Computing Base Language with n-Value Logic. [Citation Graph (0, 0)][DBLP]
    FJCC, 1986, pp:353-361 [Conf]
  4. Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
    Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP. [Citation Graph (0, 0)][DBLP]
    ICDCS Workshops, 2003, pp:8-13 [Conf]
  5. Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
    Dynamic Load Balancing Using Network Transferable Computer. [Citation Graph (0, 0)][DBLP]
    ICDCS Workshops, 2005, pp:51-57 [Conf]
  6. Fuminori Nakanishi, Shinnya Hiraike, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda
    A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation. [Citation Graph (0, 0)][DBLP]
    ICECCS, 2000, pp:210-217 [Conf]
  7. Naoki Asakawa, Kenji Toda, Yoshimi Takeuchi
    Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece. [Citation Graph (0, 0)][DBLP]
    ICRA, 1998, pp:2452-2457 [Conf]
  8. Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
    The Execution Model and the Architecture for Real-Time Parallel Systems. [Citation Graph (0, 0)][DBLP]
    IFIP Congress (1), 1994, pp:177-182 [Conf]
  9. Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada
    Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:336-343 [Conf]
  10. Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba
    A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3) [Citation Graph (0, 0)][DBLP]
    ISCA, 1983, pp:363-369 [Conf]
  11. Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi
    The Hardware Architecture of the CODA Real-Time Parallel Processor. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:395-402 [Conf]
  12. Kenji Toda, Yoshinobu Uchibori, Toshitsugu Yuba
    The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1989, pp:306-322 [Conf]
  13. Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
    Performance comparison of real-time architectures using simulation. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1995, pp:150-0 [Conf]
  14. Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
    CODA-R: a reconfigurable testbed for real-time parallel computation. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1997, pp:252-259 [Conf]
  15. Hiroyuki Yokoyama, Kenji Toda
    FPGA-Based Content Protection System for Embedded Consumer Electronics. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2005, pp:502-507 [Conf]
  16. Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
    A Priority Forwarding Router Chip for Real-Time Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1994, pp:63-73 [Conf]
  17. Toshio Shimada, Kenji Toda, Kenji Nishida
    Real-Time Parallel Architecture for Sensor Funsion. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1992, v:15, n:2, pp:143-152 [Journal]
  18. Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu
    Real-world applications of analog and digital evolvable hardware . [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Evolutionary Computation, 1999, v:3, n:3, pp:220-235 [Journal]
  19. Yohei Hori, Hiroyuki Yokoyama, Kenji Toda
    Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]
  20. Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
    A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  21. Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. [Citation Graph (, )][DBLP]


  22. Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems. [Citation Graph (, )][DBLP]


  23. A priority forwarding scheme for real-time multistage interconnection networks. [Citation Graph (, )][DBLP]


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