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Publications of Author

1. Prasenjit Biswas, Chien-Chao Tseng
   LogDf: A Data-Driven Abstract Machine Model for Parallel Execution of Logic Programs. [Citation Graph (0, 0)][DBLP]
   FGCS, 1988, pp:1059-1070 [Conf]
   
2. Prasenjit Biswas, Shyh-Chang Su, David Y. Y. Yun
   A Scalable Abstract Machine Model to Support Limited-OR (LOR) / Restricted-AND Parallelism (RAP) in Logic Programs. [Citation Graph (0, 0)][DBLP]
   ICLP/SLP, 1988, pp:1160-1179 [Conf]
   
3. Chien-Chao Tseng, Prasenjit Biswas
   A Data-Driven Parallel Execution Model for Logic Programs. [Citation Graph (0, 0)][DBLP]
   ICLP/SLP, 1988, pp:1204-1222 [Conf]
   
4. Surapong Auwatanamongkol, Prasenjit Biswas
   A Hybrid Architecture and Adaptive Scheduling for Parallel Execution of Logic Programs. [Citation Graph (0, 0)][DBLP]
   ICPP (1), 1991, pp:17-20 [Conf]
   
5. Behrooz Shirazi, Krishna M. Kavi, Ali R. Hurson, Prasenjit Biswas
   PARSA: A Parallel Program Scheduling and Assessment Environment. [Citation Graph (0, 0)][DBLP]
   ICPP, 1993, pp:68-72 [Conf]
   
6. Prasenjit Biswas, Arun K. Majumdar
   A Fuzzy Hybrid Model for Pattern Classification. [Citation Graph (0, 0)][DBLP]
   Pattern Recognition, 1988, pp:183-192 [Conf]
   
7. Prasenjit Biswas, Arun K. Majumdar
   A supervised learning algorithm for hierarchical classification of fuzzy patterns. [Citation Graph (0, 0)][DBLP]
   Inf. Sci., 1983, v:31, n:2, pp:91-106 [Journal]
   
8. Prasenjit Biswas, Atsushi Hasegawa, Srinivas Mandaville, Mark Debbage, Andy Sturges, Fumio Arakawa, Yasuhiko Saito, Kunio Uchiyama
   SH-5: The 64-Bit SuperH Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2000, v:20, n:4, pp:28-39 [Journal]
   
9. Surapong Auwatanamongkol, Andrzej Ciepielewski, Prasenjit Biswas
   Cut and Side-Effects in a Data-Driven Implementation of Prolog. [Citation Graph (0, 0)][DBLP]
   New Generation Comput., 1994, v:12, n:3, pp:223-250 [Journal]
   
10. 
    Streaming FFT on REDEFINE-v2: an application-architecture design space exploration. [Citation Graph (, )][DBLP]