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Mark Vesterbacka: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Peter Nilsson, Mats Torkelson, Kent Palmkvist, Mark Vesterbacka, Lars Wanhammar
    A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock. [Citation Graph (0, 0)][DBLP]
    Mobile Communications, 1994, pp:510-521 [Conf]
  2. Krister Landernäs, Johnny Holmberg, Mark Vesterbacka
    A high-speed low-latency digit-serial hybrid adder. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2004, pp:217-220 [Conf]
  3. Erik Sall, Mark Vesterbacka, K. Ola Andersson
    A study of digital decoders in flash analog-to-digital converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:129-132 [Conf]
  4. Mark Vesterbacka, Kent Palmkvist, Peter Sandberg, Lars Wanhammar
    Implementation of Fast Bit-Serial Lattice Wave Digital Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:113-116 [Conf]
  5. Mark Vesterbacka, J. Jacob Wikner
    Design of encoders for linear-coded D/A converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:524-527 [Conf]
  6. Mark Vesterbacka
    A robust differential scan flip-flop. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:334-337 [Conf]
  7. Magnus Karlsson, Mark Vesterbacka, Wlodek Kulesza
    A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:425-428 [Conf]
  8. K. Ola Andersson, N. U. Andersson, Mark Vesterbacka, J. Jacob Wikner
    A differential DAC architecture with variable common-mode level. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:113-116 [Conf]
  9. Robert Hägglund, Per Löwenborg, Mark Vesterbacka
    A polynomial-based division algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:571-574 [Conf]
  10. K. Ola Andersson, Mark Vesterbacka
    A Parameterized Cell-Based Design Approach for Digital-to-Analog Converters. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2004, pp:225-228 [Conf]
  11. Erik Sall, Mark Vesterbacka
    Design of a Comparator in CMOS SOI. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2004, pp:229-232 [Conf]
  12. Magnus Karlsson, Mark Vesterbacka
    Digit-serial/parallel multipliers with improved throughput and latency. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

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