The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Jacobo Valdes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hector Garcia-Molina, Richard J. Lipton, Jacobo Valdes
    A Massive Memory Machine. [Citation Graph (11, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:5, pp:391-399 [Journal]
  2. Richard J. Lipton, Robert Sedgewick, Jacobo Valdes
    Programming Aspects of VLSI. [Citation Graph (1, 0)][DBLP]
    POPL, 1982, pp:57-65 [Conf]
  3. Richard J. Lipton, Jacobo Valdes
    Census Functions: an Approach to VLSI Upper Bounds (Preliminary Version) [Citation Graph (0, 0)][DBLP]
    FOCS, 1981, pp:13-22 [Conf]
  4. Jeremy Spinrad, Jacobo Valdes
    Recognition and Isomorphism of Two Dimensional Partial Orders. [Citation Graph (0, 0)][DBLP]
    ICALP, 1983, pp:676-686 [Conf]
  5. Jacobo Valdes, Robert Endre Tarjan, Eugene L. Lawler
    The recognition of Series Parallel digraphs [Citation Graph (0, 0)][DBLP]
    STOC, 1979, pp:1-12 [Conf]
  6. Jacobo Valdes, Robert Endre Tarjan, Eugene L. Lawler
    The Recognition of Series Parallel Digraphs. [Citation Graph (0, 0)][DBLP]
    SIAM J. Comput., 1982, v:11, n:2, pp:298-313 [Journal]
  7. Richard J. Lipton, Jacobo Valdes, Gopalakrishnan Vijayan, Stephen C. North, Robert Sedgewick
    VLSI Layout as Programming. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Program. Lang. Syst., 1983, v:5, n:3, pp:405-421 [Journal]

Search in 0.001secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002