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Hwa C. Torng: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. D. A. Stern, Hwa C. Torng
    NAND Cellular Arrays [Citation Graph (0, 0)][DBLP]
    FOCS, 1971, pp:91-104 [Conf]
  2. George E. Daddis Jr., Hwa C. Torng
    The Concurrent Execution of Multiple Instruction Streams on Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:76-83 [Conf]
  3. Harry Dwyer, Hwa C. Torng
    An out-of-order superscalar processor with speculative execution and fast, precise interrupts. [Citation Graph (0, 0)][DBLP]
    MICRO, 1992, pp:272-281 [Conf]
  4. Ramón D. Acosta, Jacob Kjelstrup, Hwa C. Torng
    An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:9, pp:815-828 [Journal]
  5. James W. Bowra, Hwa C. Torng
    The Modeling and Design of Multiple Function-Unit Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1976, v:25, n:3, pp:210-221 [Journal]
  6. Kwok-Tung Fung, Hwa C. Torng
    On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1979, v:28, n:1, pp:28-37 [Journal]
  7. Hwa C. Torng, Martin Day
    Interrupt Handling for Out-of-Order Execution Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:1, pp:122-127 [Journal]
  8. Hwa C. Torng, Neil C. Wilhelm
    The Optimal Interconnection of Circuit Modules in Microprocessor and Digital System Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:5, pp:450-457 [Journal]

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