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Eduardo I. Boemo: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Eduardo I. Boemo, Sergio López-Buedo, Juan M. Meneses
The Wave Pipeline Effect on LUT-Based FPGA Architectures. [Citation Graph (0, 0)][DBLP]
FPGA, 1996, pp:45-50 [Conf] - Sergio López-Buedo, Eduardo I. Boemo
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report. [Citation Graph (0, 0)][DBLP]
FPGA, 2004, pp:79-86 [Conf] - Elias Todorovich, Eduardo I. Boemo, F. Cardells, J. Valls
Power analysis and estimation tool integrated with XPOWER. [Citation Graph (0, 0)][DBLP]
FPGA, 2004, pp:259- [Conf] - Eduardo I. Boemo, Sergio López-Buedo
Thermal monitoring on FPGAs using ring-oscillators. [Citation Graph (0, 0)][DBLP]
FPL, 1997, pp:69-78 [Conf] - Eduardo I. Boemo, Guillermo González de Rivera, Sergio López-Buedo, Juan M. Meneses
Some Notes on Power Management on FPGA-Based Systems. [Citation Graph (0, 0)][DBLP]
FPL, 1995, pp:149-157 [Conf] - Sergio López-Buedo, Paula Riviere, Pablo Pernas, Eduardo I. Boemo
Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology. [Citation Graph (0, 0)][DBLP]
FPL, 2002, pp:162-170 [Conf] - Gustavo Sutter, Elias Todorovich, Sergio López-Buedo, Eduardo I. Boemo
FSM Decomposition for Low Power in FPGA. [Citation Graph (0, 0)][DBLP]
FPL, 2002, pp:350-359 [Conf] - Elias Todorovich, F. Angarita, J. Valls, Eduardo I. Boemo
Statistical Power Estimation for FPGA. [Citation Graph (0, 0)][DBLP]
FPL, 2005, pp:515-518 [Conf] - Elias Todorovich, M. Gilabert, Gustavo Sutter, Sergio López-Buedo, Eduardo I. Boemo
A Tool for Activity Estimation in FPGAs. [Citation Graph (0, 0)][DBLP]
FPL, 2002, pp:340-349 [Conf] - J. Valls, T. Sansaloni, M. M. Peiro, Eduardo I. Boemo
Fast FPGA-based pipelined digit-serial/parallel multipliers. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 1999, pp:482-485 [Conf] - Gustavo Sutter, Jean-Pierre Deschamps, Gery Bioul, Eduardo I. Boemo
Power Aware Dividers in FPGA. [Citation Graph (0, 0)][DBLP]
PATMOS, 2004, pp:574-584 [Conf] - Gustavo Sutter, Elias Todorovich, Sergio López-Buedo, Eduardo I. Boemo
Low-Power FSMs in FPGA: Encoding Alternatives. [Citation Graph (0, 0)][DBLP]
PATMOS, 2002, pp:363-370 [Conf] - C. M. Gonzalez, H. A. Larrondo, C. A. Gayoso, L. J. Arnone, Eduardo I. Boemo
Digital Signal Transmission with Chaotic Encryption: Design and Evaluation of a FPGA Realization [Citation Graph (0, 0)][DBLP]
CoRR, 2004, v:0, n:, pp:- [Journal] - Sergio López-Buedo, Javier Garrido, Eduardo I. Boemo
Thermal Testing on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
IEEE Design & Test of Computers, 2000, v:17, n:1, pp:84-91 [Journal] - Elias Todorovich, Eduardo I. Boemo
A-B Nodes Classification for Power Estimation. [Citation Graph (0, 0)][DBLP]
FPL, 2006, pp:1-6 [Conf] - J. Gonzalez-Gomez, Ivan Gonzalez, Francisco J. Gomez-Arribas, Eduardo I. Boemo
Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors. [Citation Graph (0, 0)][DBLP]
ARC, 2006, pp:24-29 [Conf] - Eduardo I. Boemo, Sergio López-Buedo, Juan M. Meneses
Some experiments about wave pipelining on FPGA's. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:232-237 [Journal]
Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor. [Citation Graph (, )][DBLP]
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