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M. Paolini: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Enrica Filippi, A. Montanaro, M. Paolini, M. Turolla
    FPGA Design Experiences Using the CSELT VIP (TM) Library. [Citation Graph (0, 0)][DBLP]
    FPGA, 1999, pp:248- [Conf]
  2. Enrica Filippi, Luciano Lavagno, L. Licciardi, A. Montanaro, M. Paolini, Roberto Passerone, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli
    Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:37-42 [Conf]
  3. M. Melgara, M. Paolini, R. Roncella, S. Morpurgo
    CVT-FERT : Automatic Generator of Analytical Faults at Register Transfer Level from Electrical and Topological Descriptions. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:250-257 [Conf]
  4. Ioannis Stamelos, M. Melgara, M. Paolini, S. Morpurgo, C. Segre
    A Multi-Level Test Pattern Generation and Validation Environment. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:90-96 [Conf]

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