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Andrés D. García: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Andrés D. García, Jean-Luc Danger, Wayne P. Burleson
    Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. [Citation Graph (0, 0)][DBLP]
    FPGA, 2000, pp:220- [Conf]
  2. Andrés D. García, Wayne P. Burleson, Jean-Luc Danger
    Power Modelling in Field Programmable Gate Arrays (FPGA). [Citation Graph (0, 0)][DBLP]
    FPL, 1999, pp:396-404 [Conf]

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