|
Search the dblp DataBase
Cameron McClintock:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose
The StratixTM routing and logic architecture. [Citation Graph (0, 0)][DBLP] FPGA, 2003, pp:12-20 [Conf]
- David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff
A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). [Citation Graph (0, 0)][DBLP] FPGA, 1998, pp:256- [Conf]
- David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
The Stratix II logic and routing architecture. [Citation Graph (0, 0)][DBLP] FPGA, 2005, pp:14-20 [Conf]
- J. Turner, Richard Cliff, W. Leong, Cameron McClintock, Ninh Ngo, K. Nguyen, C. K. Sung, B. Wang, J. Watson
Migration of a Dual Granularity Globally Interconnected PLD Architecture to a 0.5 µm TLM Process. [Citation Graph (0, 0)][DBLP] FPL, 1995, pp:15-20 [Conf]
Search in 0.001secs, Finished in 0.001secs
|