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Mark Bourgeault: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
    The Stratix II logic and routing architecture. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:14-20 [Conf]
  2. Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron Egier, Jonathan Rose
    Automatic transistor and physical design of FPGA tiles from an architectural specification. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:164-172 [Conf]
  3. Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini
    Improving FPGA Performance and Area Using an Adaptive Logic Module. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:135-144 [Conf]

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