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Huiqun Liu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Huiqun Liu, D. F. Wong
Circuit Partitioning for Dynamically Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
FPGA, 1999, pp:187-194 [Conf] - Huiqun Liu, Kai Zhu, D. F. Wong
Circuit Partitioning with Complex Resource Constraints in FPGAs. [Citation Graph (0, 0)][DBLP]
FPGA, 1998, pp:77-84 [Conf] - Huiqun Liu, D. F. Wong
Network flow based circuit partitioning for time-multiplexed FPGAs. [Citation Graph (0, 0)][DBLP]
ICCAD, 1998, pp:497-504 [Conf] - Huiqun Liu, D. F. Wong
A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning. [Citation Graph (0, 0)][DBLP]
ICCAD, 1999, pp:400-405 [Conf] - Huiqun Liu, D. F. Wong
Network flow based multi-way partitioning with area and pin constraints. [Citation Graph (0, 0)][DBLP]
ISPD, 1997, pp:12-17 [Conf] - Huiqun Liu, Martin D. F. Wong
Network-flow-based multiway partitioning with area and pin constraints. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:1, pp:50-59 [Journal]
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