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Sherif M. Saif:
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- Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar
An FPGA implementation of block truncation coding for gray and color images. [Citation Graph (0, 0)][DBLP] FPGA, 2004, pp:245- [Conf]
- Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar
FPGA implementation of block truncation coding algorithm for gray scale images. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2003, pp:448-451 [Conf]
- Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar, Abdelmonem A. Wahdan
An FPGA implementation of a neural optimization of block truncation coding for image/video compression. [Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2007, v:31, n:8, pp:477-486 [Journal]
An FPGA Implementation of a Competitive Hopfield Neural Network for Use in Histogram Equalization. [Citation Graph (, )][DBLP]
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