The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Sherif M. Saif: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar
    An FPGA implementation of block truncation coding for gray and color images. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:245- [Conf]
  2. Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar
    FPGA implementation of block truncation coding algorithm for gray scale images. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:448-451 [Conf]
  3. Sherif M. Saif, Hazem M. Abbas, Salwa M. Nassar, Abdelmonem A. Wahdan
    An FPGA implementation of a neural optimization of block truncation coding for image/video compression. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2007, v:31, n:8, pp:477-486 [Journal]

  4. An FPGA Implementation of a Competitive Hopfield Neural Network for Use in Histogram Equalization. [Citation Graph (, )][DBLP]


Search in 0.000secs, Finished in 0.000secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002