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Rachid Beguenane:
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- Stéphane Simard, Rachid Beguenane, Éric Larouche, Luc Morin
A 2005 review of FPGA arithmetic (abstract only). [Citation Graph (0, 0)][DBLP] FPGA, 2005, pp:276- [Conf]
- Luc Morin, Rachid Beguenane, Stéphane Simard, Éric Larouche
A new bit-serial multiplier architecture for area-efficient fpga implementation. [Citation Graph (0, 0)][DBLP] Circuits, Signals, and Systems, 2004, pp:333-338 [Conf]
- Rachid Beguenane, Mohand A. Ouhrouche, Andrzej M. Trzynadlowski
A new scheme for sensorless induction motor control drives operating in low speed region. [Citation Graph (0, 0)][DBLP] Mathematics and Computers in Simulation, 2006, v:71, n:2, pp:109-120 [Journal]
- Rachid Beguenane, Jean-Gabriel Mailloux, Stéphane Simard, Arnaud Tisserand
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time. [Citation Graph (0, 0)][DBLP] CCECE, 2006, pp:1073-1077 [Conf]
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