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Publications of Author

1. Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría
   Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:497-506 [Conf]
   
2. Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez
   Doppler Location Algorithm for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   International Conference on Wireless Networks, 2004, pp:509-514 [Conf]
   
3. Jaime Jimenez, Iker Hoyos, Jagoba Arias, Armando Astorlao, José Luis Martín
   Modifying Slots in Test Vectors to Validate Decoders of a Train Network. [Citation Graph (0, 0)][DBLP]
   ICWMC, 2006, pp:58- [Conf]
   
4. Jagoba Arias, Eduardo Santos, Itziar Marin, Jaime Jimenez, Jesús Lázaro, Aitzol Zuloaga
   Node Synchronization in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   ICWMC, 2006, pp:50- [Conf]
   
5. Jaime Jimenez, José Luis Martín, Aitzol Zuloaga, Unai Bidarte, Jagoba Arias
   Comparison of two designs for the multifunction vehicle bus. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:5, pp:797-805 [Journal]
   
6. Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa
   GPS-less location algorithm for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
   Computer Communications, 2007, v:30, n:14-15, pp:2904-2916 [Journal]
   
7. Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez
   Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs. [Citation Graph (0, 0)][DBLP]
   Journal of Systems Architecture, 2007, v:53, n:9, pp:629-643 [Journal]
   
8. 
   Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes. [Citation Graph (, )][DBLP]
   
   
9. 
   DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus. [Citation Graph (, )][DBLP]
   
   
10. 
    AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications. [Citation Graph (, )][DBLP]
    
    
11. 
    Overview of FPGA-Based Multiprocessor Systems. [Citation Graph (, )][DBLP]
    
    
12. 
    PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems. [Citation Graph (, )][DBLP]