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Publications of Author

1. Shrutisagar Chandrasekaran, Abbes Amira
   High Speed / Low Power Architectures for the Finite Radon Transform. [Citation Graph (0, 0)][DBLP]
   FPL, 2005, pp:450-455 [Conf]
   
2. Shrutisagar Chandrasekaran, Abbes Amira
   An area efficient low power inner product computation for discrete orthogonal transforms. [Citation Graph (0, 0)][DBLP]
   ICIP (3), 2005, pp:1024-1027 [Conf]
   
3. S. Chandrasekaran, A. Amira
   FPGA Implementation and Power Modelling of the Fast Walsh Transform. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-4 [Conf]
   
4. S. Chandrasekaran, A. Amira
   Power Reduction for FPGA Implementations : Design Optimisation and High Level Modelling. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-2 [Conf]
   
5. S. Chandrasekaran, A. Amira
   Novel Sparse OBC based Distributed Arithmetic Architecture for Matrix Transforms. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:3207-3210 [Conf]
   
6. 
   High Performance FPGA Implementation of the Mersenne Twister. [Citation Graph (, )][DBLP]
   
   
7. 
   A New Behavioural Power Modelling Approach for FPGA based Custom Cores. [Citation Graph (, )][DBLP]