The SCEAS System
Navigation Menu

Search the dblp DataBase


Didier Cottet: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard Tröster
    High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:525-534 [Conf]
  2. Michael Scheffler, Didier Cottet, Gerhard Tröster
    A simplified yield modeling method for design rule trade-off in interconnection substrates. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:6, pp:861-869 [Journal]
  3. Didier Cottet, Michael Scheffler, Gerhard Tröster
    A novel, zone based process monitoring method for low cost MCM-D substrates manufactured on large area panels. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:3, pp:417-426 [Journal]

Search in 0.001secs, Finished in 0.001secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002