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Ana Antunes: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernando Morgado Dias
    Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:1084-1086 [Conf]
  2. Fernando Morgado Dias, Ana Antunes, José Vieira, Alexandre Manuel Mota
    Using the Levenberg-Marquardt for On-line Training of a Variant System. [Citation Graph (0, 0)][DBLP]
    ICANN (2), 2005, pp:359-364 [Conf]
  3. Fernando Morgado Dias, Ana Antunes, José Vieira, Alexandre Manuel Mota
    On-Line Learning of a Time Variant System. [Citation Graph (0, 0)][DBLP]
    IEA/AIE, 2006, pp:908-916 [Conf]
  4. Fernando Morgado Dias, Ana Antunes, José Vieira, Alexandre Manuel Mota
    On-line Training of Neural Networks: A Sliding Window Approach for the Levenberg-Marquardt Algorithm. [Citation Graph (0, 0)][DBLP]
    IWINAC (2), 2005, pp:577-585 [Conf]
  5. Ana Antunes, Fernando Morgado Dias, José Vieira, Alexandre Mota
    Delay Compensator: an Approach to Reduce the Variable Sampling to Actuation Delay Effect in Distributed Real-time Control Systems. [Citation Graph (0, 0)][DBLP]
    ETFA, 2006, pp:531-536 [Conf]
  6. Ana Antunes, P. Pedreiras, Alexandre Manuel Mota
    Adapting the sampling period of a real-time adaptive distributed controller to the bus load. [Citation Graph (0, 0)][DBLP]
    ETFA, 2005, pp:- [Conf]
  7. Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernando Morgado Dias
    A high bit resolution FPGA implementation of a FNN with a new algorithm for the activation function. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2007, v:71, n:1-3, pp:71-77 [Journal]

  8. A Neural Model for Delay Correction in a Distributed Control System. [Citation Graph (, )][DBLP]


  9. A neuro-fuzzy delay compensator for distributed control systems. [Citation Graph (, )][DBLP]


  10. A neural network delay compensator for networked control systems. [Citation Graph (, )][DBLP]


  11. Fault Tolerance Improvement through Architecture Change in Artificial Neural Networks. [Citation Graph (, )][DBLP]


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