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Ricardo José Colom-Palero:
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Publications of Author
- Rafael Gadea Gironés, Agustín Ramirez-Agundis, Joaquín Cerdá-Boluda, Ricardo José Colom-Palero
FPGA Implementation of Adaptive Non-linear Predictors for Video Compression. [Citation Graph (0, 0)][DBLP] FPL, 2003, pp:1016-1019 [Conf]
- Marcos Martínez Peiró, Francisco Ballester, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer
FPGA Custom DSP for ECG Signal Analysis and Compression. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:954-958 [Conf]
- Ricardo José Colom-Palero, Rafael Gadea Gironés, Francisco Ballester, Marcos Martínez Peiró
Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices. [Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2004, v:28, n:9, pp:509-518 [Journal]
- Ricardo José Colom-Palero, Rafael Gadea Gironés, Angel Sebastià-Cortés
A Novel FPGA Architecture of a 2-D Wavelet Transform. [Citation Graph (0, 0)][DBLP] VLSI Signal Processing, 2006, v:42, n:3, pp:273-284 [Journal]
SoC-Based Implementation of the Backpropagation Algorithm for MLP. [Citation Graph (, )][DBLP]
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA. [Citation Graph (, )][DBLP]
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