|
Search the dblp DataBase
Urs Kanus:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Urs Kanus, Gregor Wetekam, Johannes Hirche, Michael Meißner
VIZARD II: An FPGA-based Interactive Volume Rendering System. [Citation Graph (0, 0)][DBLP] FPL, 2002, pp:1114-1117 [Conf]
- Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel, Urs Kanus, Wolfgang Straßer
Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP] FPL, 2005, pp:185-190 [Conf]
- Michael Meißner, Michael C. Doggett, Urs Kanus, Johannes Hirche
Accelerating volume rendering using an on-chip SRAM occupancy map. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2001, pp:757-760 [Conf]
- Michael Meißner, Michael C. Doggett, Johannes Hirche, Urs Kanus, Wolfgang Straßer
Efficient Space Leaping for Raycasting Architectures. [Citation Graph (0, 0)][DBLP] Volume Graphics, 2001, pp:- [Conf]
- Urs Kanus, Michael Meißner, Wolfgang Straßer, Hanspeter Pfister, Arie E. Kaufman, Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider
Implementations of cube-4 on the teramac custom computing machine. [Citation Graph (0, 0)][DBLP] Computers & Graphics, 1997, v:21, n:2, pp:199-208 [Journal]
- Gregor Wetekam, Dirk Staneker, Urs Kanus, M. Wand
A hardware architecture for multi-resolution volume rendering. [Citation Graph (0, 0)][DBLP] Graphics Hardware, 2005, pp:45-51 [Conf]
- Urs Kanus, Gregor Wetekam, Johannes Hirche
VoxelCache: a cache-based memory architecture for volume graphics. [Citation Graph (0, 0)][DBLP] Graphics Hardware, 2003, pp:76-83 [Conf]
Search in 0.003secs, Finished in 0.004secs
|