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Joaquín Olivares: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides
    Minimum Sum of Absolute Differences Implementation in a Single FPGA Device. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:986-990 [Conf]
  2. Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides, Emilio L. Zapata
    SAD computation based on online arithmetic for motion estimation. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:5, pp:250-258 [Journal]
  3. Joaquín Olivares, Ignacio Benavides, Javier Hormigo, Julio Villalba, Emilio L. Zapata
    Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  4. Biprocessor SoC in an FPGA for Teaching Purposes. [Citation Graph (, )][DBLP]


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