The SCEAS System
Navigation Menu

Search the dblp DataBase


Salim Renane: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jerome Quartana, Salim Renane, Arnaud Baixas, Laurent Fesquet, Marc Renaudin
    GALS systems prototyping using multiclock FPGAs and asynchronous network-on-chips. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:299-304 [Conf]

Search in 0.002secs, Finished in 0.002secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002