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S. S. Yau: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. S. Yau, H. S. Fung
    Associative Processor Architecture - A Survey. [Citation Graph (3, 0)][DBLP]
    ACM Comput. Surv., 1977, v:9, n:1, pp:3-27 [Journal]
  2. S. S. Yau, Haiqing Ying
    A clustering algorithm for object-oriented development of distributed computing system software. [Citation Graph (0, 0)][DBLP]
    FTDCS, 1995, pp:274-283 [Conf]
  3. S. S. Yau, Jun Zhu
    Intrusion ripple analysis in distributed information systems. [Citation Graph (0, 0)][DBLP]
    FTDCS, 1997, pp:28-33 [Conf]
  4. S. S. Yau, R. C. Cheung, D. C. Cochrane
    An Approach to Error-Resistant Software Design. [Citation Graph (0, 0)][DBLP]
    ICSE, 1976, pp:429-436 [Conf]
  5. L. W. Smith, S. S. Yau
    Generational of regular expressions for automata by the integral of regular expressions. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1972, v:15, n:3, pp:222-228 [Journal]
  6. S. S. Yau, Y. S. Tang
    Generation of Shortest Test Sequences for Detecting Individual Faults of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1979, v:22, n:2, pp:169-172 [Journal]
  7. Douglas C. Bossen, S. S. Yau
    Redundant Residue Polynomial Codes [Citation Graph (0, 0)][DBLP]
    Information and Control, 1968, v:13, n:6, pp:597-618 [Journal]
  8. Roger W. Ehrich, S. S. Yau
    Two-Way Sequential Transductions and Stack Automata [Citation Graph (0, 0)][DBLP]
    Information and Control, 1971, v:18, n:5, pp:404-446 [Journal]

  9. Universal logic circuits and their modular realizations. [Citation Graph (, )][DBLP]

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