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Publications of Author

1. Michal Bidlo
   A benchmark for the sorting network problem. [Citation Graph (0, 0)][DBLP]
   GECCO Workshops, 2005, pp:289-291 [Conf]
   
2. Michal Bidlo, Lukás Sekanina
   Providing information from the environment for growing electronic circuits through polymorphic gates. [Citation Graph (0, 0)][DBLP]
   GECCO Workshops, 2005, pp:242-248 [Conf]
   
3. Lukás Sekanina, Michal Bidlo
   Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. [Citation Graph (0, 0)][DBLP]
   Genetic Programming and Evolvable Machines, 2005, v:6, n:3, pp:319-347 [Journal]
   
4. Michal Bidlo
   Evolutionary Design of Generic Combinational Multipliers Using Development. [Citation Graph (0, 0)][DBLP]
   ICES, 2007, pp:77-88 [Conf]
   
5. 
   A method for design of impulse bursts noise filters optimized for FPGA implementations. [Citation Graph (, )][DBLP]
   
   
6. 
   Development of combinational circuits using non-uniform cellular automata: initial results. [Citation Graph (, )][DBLP]
   
   
7. 
   Cellular Automata-Based Development of Combinational and Polymorphic Circuits: A Comparative Study. [Citation Graph (, )][DBLP]
   
   
8. 
   Evolutionary Development of Generic Multipliers: Initial Results. [Citation Graph (, )][DBLP]
   
   
9. 
   Investigating gate-level evolutionary development of combinational multipliers using enhanced cellular automata-based model. [Citation Graph (, )][DBLP]