The SCEAS System
Navigation Menu

Search the dblp DataBase


Lars J. Svensson: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Daniel A. Andersson, Lars J. Svensson, Per Larsson-Edefors
    Accounting for the skin effect during repeater insertion. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:32-37 [Conf]
  2. Daniel Eckerbert, Lars J. Svensson, Per Larsson-Edefors
    A Mixed-Mode Delay-Locked-Loop Architecture. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:261-263 [Conf]
  3. William C. Athas, W.-C. Liu, Lars J. Svensson
    Energy-recovery CMOS for highly pipelined DSP designs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:101-104 [Conf]
  4. William C. Athas, Nestoras Tzartzanis, Lars J. Svensson, Lena Peterson, Huimin Li, Xing Yu Jiang, Peiqing Wang, W.-C. Liu
    AC-1: a clock-powered microprocessor. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1997, pp:328-333 [Conf]
  5. Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson, Lars J. Svensson
    Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:225-230 [Conf]
  6. Mindaugas Drazdziulis, Per Larsson-Edefors, Lars J. Svensson
    Overdrive Power-Gating Techniques for Total Power Minimization. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:125-132 [Conf]
  7. Daniel A. Andersson, Lars J. Svensson, Per Larsson-Edefors
    On Skin Effect in On-Chip Interconnects. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:463-470 [Conf]
  8. Henrik Eriksson, Kimmo Eriksson, Johan Karlander, Lars J. Svensson, Johan Wästlund
    Sorting a bridge hand. [Citation Graph (0, 0)][DBLP]
    Discrete Mathematics, 2001, v:241, n:1-3, pp:289-300 [Journal]
  9. Martin Thuresson, Magnus Själander, Magnus Bjork, Lars Svensson, Per Larsson-Edefors, Per Stenström
    FlexCore: Utilizing Exposed Datapath Control for Efficient Computing. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:18-25 [Conf]
  10. William C. Athas, Lars J. Svensson, J. G. Koller, Nestoras Tzartzanis, E. Ying-Chin Chou
    Low-power digital systems based on adiabatic-switching principles. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1994, v:2, n:4, pp:398-407 [Journal]

  11. On-chip power supply noise and its implications on timing. [Citation Graph (, )][DBLP]

  12. Noise Interaction Between Power Distribution Grids and Substrate. [Citation Graph (, )][DBLP]

  13. Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach. [Citation Graph (, )][DBLP]

Search in 0.003secs, Finished in 0.004secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002