Hung Tien Bui, Yvon Savaria High speed differential pulse-width control loop based on frequency-to-voltage converters. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2006, pp:53-56 [Conf]
Hung Tien Bui, Yvon Savaria Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector. [Citation Graph (0, 0)][DBLP] ISCAS (4), 2004, pp:369-372 [Conf]
Hung Tien Bui, Yvon Savaria 10 GHz PLL Using Active Shunt-Peaked MCML Gates and Improved Frequency Acquisition XOR Phase Detector in 0.18 µm CMOS. [Citation Graph (0, 0)][DBLP] IWSOC, 2004, pp:115-118 [Conf]
Hung Tien Bui, Yvon Savaria A Generic Method for Embedded Measurement and Compensation of Process and Temperature Variations in SoCs. [Citation Graph (0, 0)][DBLP] IWSOC, 2005, pp:557-562 [Conf]