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Jo Dale Carothers: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Craig Beebe, Jo Dale Carothers, Alfonso Ortega
    MCM placement using a realistic thermal model. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2000, pp:189-192 [Conf]
  2. Craig Beebe, Jo Dale Carothers, Alfonso Ortega
    Object-Oriented Thermal Placement using an Accurate Heat Model. [Citation Graph (0, 0)][DBLP]
    HICSS, 1999, pp:- [Conf]
  3. R. D. Newbould, Jo Dale Carothers, J. J. Rodriguez, W. T. Holman
    A hierarchy of physical design watermarking schemes for intellectual property protection of IC designs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:862-865 [Conf]
  4. Kusnadi, Jo Dale Carothers
    A method of measuring nets routability for MCM's general area routing problems. [Citation Graph (0, 0)][DBLP]
    ISPD, 1999, pp:186-192 [Conf]
  5. M. C. Scott, M. O. Peralta, Jo Dale Carothers
    System and Framework for QA of Process Design Kits. [Citation Graph (0, 0)][DBLP]
    ISQED, 2003, pp:138-143 [Conf]
  6. Tom Hameenanttila, Xin-Li Guan, Jo Dale Carothers, Jian-Xin Chen
    The Flexible Hypercube: A New Fault-Tolerant Architecture for Parallel Computing. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:37, n:2, pp:213-220 [Journal]
  7. Kusnadi, Craig Beebe, Jo Dale Carothers
    Digraph visualization using a neural algorithm with a heuristic activation scheme. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Systems, Man, and Cybernetics, Part B, 1998, v:28, n:4, pp:562-572 [Journal]
  8. Radj Radjassamy, Jo Dale Carothers
    Faster power estimation of CMOS designs using vector compaction - a fractal approach. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Systems, Man, and Cybernetics, Part B, 2003, v:33, n:3, pp:476-488 [Journal]
  9. Tom Hameenanttila, Jo Dale Carothers, Donghui Li
    Fast coupled noise estimation for crosstalk avoidance in the MCG multichip module autorouter. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:356-368 [Journal]

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