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Hormoz Djahanshahi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
Design and VLSI Implementation of a Unified Synapse-Neuron Architecture. [Citation Graph (0, 0)][DBLP]
Great Lakes Symposium on VLSI, 1996, pp:228-233 [Conf] - Pedram Sameni, Chris Siu, Shahriar Mirabbasi, Hormoz Djahanshahi, Marwa Hamour, Krzysztof Iniewski, Jatinder Chana
Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2005, pp:5071-5074 [Conf] - Hormoz Djahanshahi, C. Andre T. Salama
Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 1999, pp:93-96 [Conf] - Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
Neural Network Integrated Circuits with Single-Block Mixed Signal Arrays. [Citation Graph (0, 0)][DBLP]
Journal of Circuits, Systems, and Computers, 1998, v:8, n:5-6, pp:589-604 [Journal] - Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
A Low-Variation Nonlinear Neuron Circuit. [Citation Graph (0, 0)][DBLP]
Journal of Circuits, Systems, and Computers, 1998, v:8, n:4, pp:447-451 [Journal]
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