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Paul Ampadu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Bo Fu, Qiaoyan Yu, Paul Ampadu
    Energy-delay minimization in nanoscale domino logic. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:316-319 [Conf]
  2. Bo Fu, Paul Ampadu
    Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1173-1176 [Conf]
  3. David Wolpert, Paul Ampadu
    Temperature-Robust Performance Yield through Supply Voltage Selection. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2279-2282 [Conf]
  4. Paul Ampadu
    Ultra-low voltage VLSI: are we there yet? [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  5. Bo Fu, Paul Ampadu
    Techniques for robust energy efficient subthreshold domino CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  6. Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment. [Citation Graph (, )][DBLP]


  7. Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects. [Citation Graph (, )][DBLP]


  8. A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip. [Citation Graph (, )][DBLP]


  9. A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits. [Citation Graph (, )][DBLP]


  10. Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip. [Citation Graph (, )][DBLP]


  11. Adaptive error control for reliable systems-on-chip. [Citation Graph (, )][DBLP]


  12. Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design. [Citation Graph (, )][DBLP]


  13. Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links. [Citation Graph (, )][DBLP]


  14. Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip. [Citation Graph (, )][DBLP]


  15. Configurable error correction for multi-wire errors in switch-to-switch SOC links. [Citation Graph (, )][DBLP]


  16. A multi-wire error correction scheme for reliable and energy efficient SOC links using hamming product codes. [Citation Graph (, )][DBLP]


  17. A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects. [Citation Graph (, )][DBLP]


  18. Normal and Reverse Temperature Dependence in Variation-Tolerant Nanoscale Systems with High-k Dielectrics and Metal Gates. [Citation Graph (, )][DBLP]


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