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Publications of Author

1. Michael I. Fuller, James P. Mabry, John A. Hossack, Travis N. Blalock
   40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2003, pp:182-185 [Conf]
   
2. Ram Suryanarayan, Anubhav Gupta, Travis N. Blalock
   A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2003, pp:273-276 [Conf]
   
3. Brandon L. Dell, Jonathan F. Bolus, Travis N. Blalock
   An automated unique tagging system using CMOS process variation. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:216-218 [Conf]
   
4. Yan Zhang, Travis Blalock, Mircea R. Stan
   A three-level toggle-avoid bus signaling scheme. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1843-1846 [Conf]
   
5. Girish B. Ratanpal, Ronald D. Williams, Travis N. Blalock
   An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Dependable Sec. Comput., 2004, v:1, n:3, pp:179-189 [Journal]
   
6. 
   SRAM-based NBTI/PBTI sensor system design. [Citation Graph (, )][DBLP]
   
   
7. 
   A 2.6 µW sub-threshold mixed-signal ECG SoC. [Citation Graph (, )][DBLP]
   
   
8. 
   Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. [Citation Graph (, )][DBLP]