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Dimitrios Karayiannis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Dimitrios Karayiannis, Spyros Tragoudas
    Uniform area timing-driven circuit implementation. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1995, pp:2-7 [Conf]
  2. Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
    Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:366-371 [Conf]
  3. Dimitrios Karayiannis, Spyros Tragoudas
    ATPD: An Automatic Test Pattern Generator for Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:443-452 [Conf]
  4. Dimitrios Karayiannis, Spyros Tragoudas
    A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:440-445 [Conf]
  5. Spyros Tragoudas, Dimitrios Karayiannis
    Implementing and clustering modules with complex delays. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:22, n:1-2, pp:39-57 [Journal]
  6. Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis
    Improved nonenumerative path-delay fault-coverage estimation based on optimal polynomial-time algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:3, pp:309-315 [Journal]
  7. Spyros Tragoudas, Dimitrios Karayiannis
    A fast nonenumerative automatic test pattern generator for pathdelay faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:7, pp:1050-1057 [Journal]

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