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Publications of Author

1. Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra
   Efficient encoding for address buses with temporal redundancy for simultaneous area and energy reduction. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2006, pp:111-114 [Conf]
   
2. Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra
   Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study. [Citation Graph (0, 0)][DBLP]
   ICCD, 2004, pp:458-463 [Conf]
   
3. Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan
   Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis. [Citation Graph (0, 0)][DBLP]
   ICCD, 2003, pp:234-239 [Conf]
   
4. Jiangjiang Liu, Brian Bell, Tan Truong
   Analysis and Characterization of Intel Itanium Instruction Bundles for Improving VLIW Processor Performance. [Citation Graph (0, 0)][DBLP]
   IMSCCS (1), 2006, pp:389-396 [Conf]
   
5. Jiangjiang Liu, Nihar R. Mahapatra, Krishnan Sundaresan
   Hardware-Only Compression to Reduce Cost and Improve Utilization of Address Buses. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2003, pp:220-221 [Conf]
   
6. Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan
   The performance advantage of applying compression to the memory system. [Citation Graph (0, 0)][DBLP]
   MSP/ISMM, 2002, pp:86-96 [Conf]
   
7. Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra
   Energy-Efficient Compressed Address Transmission. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2005, pp:592-597 [Conf]
   
8. Peggy Israel Doerschuk, Jiangjiang Liu, Judith Mann
   Pilot summer camps in computing for middle school girls: from organization through assessment. [Citation Graph (0, 0)][DBLP]
   ITiCSE, 2007, pp:4-8 [Conf]
   
9. 
   Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses. [Citation Graph (, )][DBLP]
   
   
10. 
    INSPIRED computing academies for middle school students: lessons learned. [Citation Graph (, )][DBLP]
    
    
11. 
    INSPIRED broadening participation: first year experience and lessons learned. [Citation Graph (, )][DBLP]
    
    
12. 
    The role of interconnects in the performance scalability of multicore architectures. [Citation Graph (, )][DBLP]
    
    
13. 
    Increasing Participation of Females and Underrepresented Minorities in Computing. [Citation Graph (, )][DBLP]