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Youngsik Kim:
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- Youngsik Kim, Parija Sule, Nazanin Mansouri
Exploiting PSL standard assertions in a theorem-proving-based verification environment. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2005, pp:400-403 [Conf]
- Youngsik Kim, Tack-Don Han, Shin-Dug Kim, Sung-Bong Yang
An Effective Memory--Processor Integrated Architecture for Computer Vision. [Citation Graph (0, 0)][DBLP] ICPP, 1997, pp:266-0 [Conf]
- Youngsik Kim, Shekhar Kopuri, Nazanin Mansouri
Automated Formal Verification of Scheduling Process Using Finite State Machines with Datapath (FSMD). [Citation Graph (0, 0)][DBLP] ISQED, 2004, pp:110-115 [Conf]
- Anli He, Parija Sule, Youngsik Kim, Nazanin Mansouri
Exploiting OVL standard assertions in a theorem-proving-based verification environment. [Citation Graph (0, 0)][DBLP] Circuits, Signals, and Systems, 2004, pp:249-254 [Conf]
- Jeong-Min Kim, Youngsik Kim, Shin-Dug Kim, Tack-Don Han, Sung-Bong Yang
An Adaptive Parallel Computer Vision System. [Citation Graph (0, 0)][DBLP] IJPRAI, 1998, v:12, n:3, pp:311-334 [Journal]
- Youngsik Kim, Oh-Young Kwon, Tack-Don Han, Youngsong Mun
Design and performance analysis of the Practical Fat Tree Network using a butterfly network. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 1997, v:43, n:1-5, pp:355-363 [Journal]
- Youngsong Mun, Kyung-Sun Min, Youngsik Kim
Performance evaluation of switching networks. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 1997, v:43, n:1-5, pp:185-188 [Journal]
- Youngsik Kim, Mi-Jung Noh, Tack-Don Han, Shin-Dug Kim
Mapping of neural networks onto the memory-processor integrated architecture. [Citation Graph (0, 0)][DBLP] Neural Networks, 1998, v:11, n:6, pp:1083-1098 [Journal]
Automated formal verification of scheduling with speculative code motions. [Citation Graph (, )][DBLP]
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