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Vamsi Krishna: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Vamsi Krishna, N. Ranganathan
    A Methodology for High Level Power Estimation and Exploration. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1998, pp:420-425 [Conf]
  2. Saraju P. Mohanty, N. Ranganathan, Vamsi Krishna
    Datapath Scheduling using Dynamic Frequency Clocking. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2002, pp:65-70 [Conf]
  3. Vamsi Krishna, Ramamurti Chandramouli, N. Ranganathan
    Computation of Lower and Upper Bounds for Switching Activity: A Unified Approach. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:230-233 [Conf]
  4. Vamsi Krishna, Abdel Ejnioui, N. Ranganathan
    A tree matching chip. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:280-285 [Conf]
  5. Vamsi Krishna, N. Ranganathan, Narayanan Vijaykrishnan
    Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:440-0 [Conf]
  6. Vamsi Krishna, N. Ranganathan, Abdel Ejnioui
    A tree-matching chip. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:2, pp:277-280 [Journal]
  7. Vamsi Krishna, Ramamurti Chandramouli, N. Ranganathan
    Computation of lower bounds for switching activity using decision theory. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:125-129 [Journal]

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