The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Sushanta K. Mandal: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural
    A simple wide-band compact model and parameter extraction using particle swarm optimization of on-chip spiral inductors for silicon RFICs. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:168-171 [Conf]
  2. Sushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural
    A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:619-624 [Conf]

  3. Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design. [Citation Graph (, )][DBLP]


  4. A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002