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Sushanta K. Mandal:
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- Sushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural
A simple wide-band compact model and parameter extraction using particle swarm optimization of on-chip spiral inductors for silicon RFICs. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2005, pp:168-171 [Conf]
- Sushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural
A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. [Citation Graph (0, 0)][DBLP] VLSI Design, 2006, pp:619-624 [Conf]
Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design. [Citation Graph (, )][DBLP]
A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process. [Citation Graph (, )][DBLP]
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