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Kwang-Hyun Baek: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe
    Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:249-252 [Conf]
  2. Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. (Dave) Liu, Sung-Mo Kang
    Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2000, pp:318-321 [Conf]
  3. Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang
    High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:59-64 [Conf]
  4. Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang
    1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:901-904 [Conf]
  5. Bo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe
    Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5621-5624 [Conf]
  6. Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang
    New current-mode sense amplifiers for high density DRAM and PIM architectures. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:938-941 [Conf]
  7. Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang
    A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:781-784 [Conf]
  8. Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang
    A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:53-56 [Conf]
  9. Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang
    An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:80-86 [Conf]
  10. Yong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang
    Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:261-0 [Conf]
  11. Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang
    A 32-bit carry lookahead adder using dual-path all-N logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:8, pp:992-996 [Journal]
  12. Soon-Ik Cho, Suki Kim, Shin-Il Lim, Kwang-Hyun Baek
    A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3379-3382 [Conf]

  13. WSKE: Web Server Key Enabled Cookies. [Citation Graph (, )][DBLP]

  14. Design of a 6 bit 1.25 GS/s DAC for WPAN. [Citation Graph (, )][DBLP]

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