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Sunil K. Chappidi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi
    Simultaneous peak and average power minimization during datapath scheduling for DSP processors. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:215-220 [Conf]
  2. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi
    Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:441-443 [Conf]
  3. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi
    An ILP-based scheduling scheme for energy efficient high performance datapath synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:313-316 [Conf]
  4. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi
    Peak Power Minimization Through Datapath Scheduling. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:121-126 [Conf]
  5. Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi
    ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:745-748 [Conf]
  6. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi
    ILP models for simultaneous energy and transient power minimization during behavioral synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:186-212 [Journal]

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