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Publications of Author

1. Hendrawan Soeleman, Kaushik Roy
   Digital CMOS logic operation in the sub-threshold region. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2000, pp:107-112 [Conf]
   
2. Hendrawan Soeleman, Dinesh Somasekhar, Kaushik Roy
   IDD Waveforms Analysis for Testing of Domino and Low Voltage Static CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1998, pp:243-248 [Conf]
   
3. Hendrawan Soeleman, Kaushik Roy
   Ultra-low power digital subthreshold logic circuits. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1999, pp:94-96 [Conf]
   
4. Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul
   Robust ultra-low power sub-threshold DTMOS logic. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2000, pp:25-30 [Conf]
   
5. Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul
   Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2001, pp:211-214 [Conf]
   
6. Hendrawan Soeleman, Kaushik Roy, Tan-Li Chou
   Estimating Circuit Activity in Combinational CMOS Digital Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2000, v:17, n:2, pp:112-119 [Journal]
   
7. Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul
   Robust subthreshold logic for ultra-low power operation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:90-99 [Journal]
   
8. C. H.-I. Kim, Hendrawan Soeleman, Kaushik Roy
   Ultra-low-power DLMS adaptive filter for hearing aid applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2003, v:11, n:6, pp:1058-1067 [Journal]