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C. Andre T. Salama :
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Dusan Suvakovic , C. Andre T. Salama Guidelines for Use of Registers and Multiplexers in Low Power Low Voltage DSP Systems. [Citation Graph (0, 0)][DBLP ] Great Lakes Symposium on VLSI, 1998, pp:26-29 [Conf ] Keng Leong Fong , C. Andre T. Salama A 10 Bit Semi-Algorithmic Current Mode DAC. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:978-981 [Conf ] Keng Leong Fong , C. Andre T. Salama Low-Power Current-Mode Algorithmic ADC. [Citation Graph (0, 0)][DBLP ] ISCAS, 1994, pp:473-476 [Conf ] Sotoudeh Humedi-Hugh , C. Andre T. Salama A novel C-band CMOS phase shifter for communication systems. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2003, pp:316-319 [Conf ] Farsheed Mahmoudi , C. Andre T. Salama 8 GHz tunable CMOS quadrature generator using differential active inductors. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2005, pp:2112-2115 [Conf ] M. Ramezani , C. Andre T. Salama A 10Gb/s CDR with a half-rate bang-bang phase detector. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2003, pp:181-184 [Conf ] F. Vessal , C. Andre T. Salama An 8-bit 2-GSample/s analog-to-digital converter in 0.5µm SiGe technology. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2003, pp:893-896 [Conf ] Shuo Xiao , C. Andre T. Salama Voltage Gain Enhancement by Conductance Cancellation in GaAs MESFET Opamps. [Citation Graph (0, 0)][DBLP ] ISCAS, 1993, pp:1073-1076 [Conf ] M. Ramezani , C. Andre T. Salama An improved bang-bang phase detector for clock and data recovery applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:715-718 [Conf ] S. Hamedi-Hagh , C. Andre T. Salama A 10 bit, 50 M sample/s, low power pipelined A/D converter for cable modem applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:424-427 [Conf ] Hormoz Djahanshahi , C. Andre T. Salama Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 1999, pp:93-96 [Conf ] F. Vessal , C. Andre T. Salama A bipolar 2-GSample/s track-and-hold amplifier (THA) in 0.35 /spl mu/m SiGe technology. [Citation Graph (0, 0)][DBLP ] ISCAS (5), 2002, pp:573-576 [Conf ] Mohamed Kawokgy , C. Andre T. Salama Low-power asynchronous viterbi decoder for wireless applications. [Citation Graph (0, 0)][DBLP ] ISLPED, 2004, pp:286-289 [Conf ] Song Ye , Koji Yano , C. Andre T. Salama 1 V, 1.9 GHz mixer using a lateral bipolar transistor in CMOS. [Citation Graph (0, 0)][DBLP ] ISLPED, 2001, pp:112-116 [Conf ] S. L. Wong , C. Andre T. Salama Improved Simulation of p- and n-channel MOSFET's Using an Enhanced SPICE MOS3 Model. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:4, pp:586-591 [Journal ] A low-power CSCD asynchronous viterbi decoder for wireless applications. [Citation Graph (, )][DBLP ] Search in 0.120secs, Finished in 0.121secs