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Publications of Author

1. Xinmiao Zhang
   Partial parallel factorization in soft-decision Reed-Solomon decoding. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2006, pp:272-277 [Conf]
   
2. Xinmiao Zhang, Keshab K. Parhi
   High-speed architectures for parallel long BCH encoders. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2004, pp:1-6 [Conf]
   
3. Xinmiao Zhang, Keshab K. Parhi
   High-speed VLSI architectures for the AES algorithm. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2004, v:12, n:9, pp:957-967 [Journal]
   
4. Xinmiao Zhang, Keshab K. Parhi
   Fast factorization architecture in soft-decision Reed-Solomon decoding. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:4, pp:413-426 [Journal]
   
5. Xinmiao Zhang, Keshab K. Parhi
   High-Speed Architectures for Parallel Long BCH Encoders. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:7, pp:872-877 [Journal]
   
6. Xinmiao Zhang, Jiangli Zhu
   Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon Decoding. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:1413-1416 [Conf]
   
7. Xinmiao Zhang
   Further Exploring the Strength of Prediction in the Factorization of Soft-Decision Reed-Solomon Decoding. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:7, pp:811-820 [Journal]
   
8. 
   High-speed Factorization Architecture for Soft-decision Reed-Solomon Decoding. [Citation Graph (, )][DBLP]
   
   
9. 
   Combined interpolation architecture for soft-decision decoding of Reed-Solomon codes. [Citation Graph (, )][DBLP]
   
   
10. 
    Novel interpolation architecture for Low-Complexity Chase soft-decision decoding of Reed-Solomon codes. [Citation Graph (, )][DBLP]
    
    
11. 
    FPGA implementation of a factorization processor for soft-decision reed-solomon decoding. [Citation Graph (, )][DBLP]
    
    
12. 
    Efficient Interpolation Architecture for Soft-Decision Reed-Solomon Decoding. [Citation Graph (, )][DBLP]
    
    
13. 
    Error correction for multi-level NAND flash memory using Reed-Solomon codes. [Citation Graph (, )][DBLP]
    
    
14. 
    Efficient interpolration architecture for soft-decision Reed-Solomon decoding by applying slow-down. [Citation Graph (, )][DBLP]