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Publications of Author

1. Junwei Zhou, Andrew Mason
   Increasing design space of the instruction queue with tag coding. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2005, pp:404-407 [Conf]
   
2. Andrew Mason, N. Yazdi, J. Zhang, Z. Sainudeen
   A modular sensor microsystem utilizing a universal interface circuit. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2003, pp:926-929 [Conf]
   
3. Prasanna Balasundaram, Karthik Vaidyanathan, Andrew Mason
   Microsystem controller for sensor network control and data correction. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:809-812 [Conf]
   
4. Cheong Kun, Shaolei Quan, Andrew Mason
   A power-optimized 64-bit priority encoder utilizing parallel priority look-ahead. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:753-756 [Conf]
   
5. Andrew Mason
   MacSurf an early NURBS shiphull design system: a historical note. [Citation Graph (0, 0)][DBLP]
   Computer-Aided Design, 2002, v:34, n:7, pp:545-546 [Journal]
   
6. Andrew Mason, Mikael Rönnqvist
   Solution methods for the balancing of jet turbines. [Citation Graph (0, 0)][DBLP]
   Computers & OR, 1997, v:24, n:2, pp:153-167 [Journal]
   
7. David Bredström, Jan T. Lundgren, Mikael Rönnqvist, Dick Carlsson, Andrew Mason
   Supply chain optimization in the pulp mill industry--IP models, column generation and novel constraint branches. [Citation Graph (0, 0)][DBLP]
   European Journal of Operational Research, 2004, v:156, n:1, pp:2-22 [Journal]
   
8. David Panton, Maria John, Stephen Lucas, Andrew Mason
   Flight test data cycle map optimisation. [Citation Graph (0, 0)][DBLP]
   European Journal of Operational Research, 2003, v:146, n:3, pp:486-497 [Journal]
   
9. Andrew Mason, Yue Huang, Chao Yang, Jichun Zhang
   Amperometric Readout and Electrode Array Chip for Bioelectrochemical Sensors. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:3562-3565 [Conf]
   
10. Awais M. Kamboh, Matthew Raetz, Andrew Mason, Karim G. Oweiss
    Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2371-2374 [Conf]
    
11. Chao Yang, Andrew Mason
    Precise RSSI with High Process Variation Tolerance. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2870-2873 [Conf]
    
12. Junwei Zhou, Andrew Mason
    A two-level hybrid select logic for wide-issue superscalar processors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
13. 
    Baseline resistance cancellation circuit for high resolution thiolate-monolayer-protected gold nanoparticle vapor sensor arrays. [Citation Graph (, )][DBLP]