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Oscar Gustafsson :
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Saeeid Tahmasbi Oskuii , Per Gunnar Kjeldsberg , Oscar Gustafsson Transition-activity aware design of reduction-stages for parallel multipliers. [Citation Graph (0, 0)][DBLP ] ACM Great Lakes Symposium on VLSI, 2007, pp:120-125 [Conf ] Oscar Gustafsson , Henrik Ohlsson A low power decimation filter architecture for high-speed single-bit sigma-delta modulation. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2005, pp:1453-1456 [Conf ] Håkan Johansson , Oscar Gustafsson Mth-band linear-phase FIR filter interpolators and decimators utilizing the Farrow structure. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2004, pp:129-132 [Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Low-complexity bit-serial constant-coefficient multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2004, pp:649-652 [Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Implementation of low-complexity FIR filters using serial arithmetic. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2005, pp:1449-1452 [Conf ] Henrik Ohlsson , Oscar Gustafsson , Lars Wanhammar A shifted permuted difference coefficient method. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 2004, pp:161-164 [Conf ] Oscar Gustafsson , Henrik Ohlsson , Lars Wanhammar Minimum-adder integer multipliers using carry-save adders. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2001, pp:709-712 [Conf ] Henrik Ohlsson , Oscar Gustafsson , Lars Wanhammar Arithmetic transformations for increased maximal sample rate of bit-parallel bireciprocal lattice wave digital filters. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2001, pp:825-828 [Conf ] Oscar Gustafsson , Håkan Johansson , Lars Wanhammar Narrow-band and wide-band single filter frequency masking FIR filters. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2001, pp:181-184 [Conf ] Oscar Gustafsson , Lars Wanhammar Implementation of maximally fast ladder wave digital filters using a numerically equivalent state-space representation. [Citation Graph (0, 0)][DBLP ] ISCAS (3), 1999, pp:419-422 [Conf ] Oscar Gustafsson , Andrew G. Dempster , Lars Wanhammar Multiplier blocks using carry-save adders. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2004, pp:473-476 [Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Switching activity in bit-serial constant-coefficient multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2004, pp:469-472 [Conf ] Oscar Gustafsson , Andrew G. Dempster , Lars Wanhammar Extended results for minimum-adder constant integer multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:73-76 [Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Power Estimation for Ripple-Carry Adders with Correlated Input Data. [Citation Graph (0, 0)][DBLP ] PATMOS, 2004, pp:662-674 [Conf ] Oscar Gustafsson , Håkan Johansson , Lars Wanhammar Single Filter Frequency-Response Masking Fir Filters. [Citation Graph (0, 0)][DBLP ] Journal of Circuits, Systems, and Computers, 2003, v:12, n:5, pp:601-630 [Journal ] Oscar Gustafsson A Difference Based Adder Graph Heuristic for Multiple Constant Multiplication Problems. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:1097-1100 [Conf ] Oscar Gustafsson , Håkan Johansson Complexity Comparison of Linear-Phase Mth-Band and General FIR Filters. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:2335-2338 [Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Approximation of elementary functions using a weighted sum of bit-products. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Erik Backenius , Erik Sall , Oscar Gustafsson Bidirectional conversion to minimum signed-digit representation. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Oscar Gustafsson , Saeeid Tahmasbi Oskuii , Kenny Johansson , Per Gunnar Kjeldsberg Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data. [Citation Graph (0, 0)][DBLP ] PATMOS, 2007, pp:526-535 [Conf ] Oscar Gustafsson , Mikael Olofsson Complexity Reduction of Constant Matrix Computations over the Binary Field. [Citation Graph (0, 0)][DBLP ] WAIFI, 2007, pp:103-115 [Conf ] Power optimization of weighted bit-product summation tree for elementary function generator. [Citation Graph (, )][DBLP ] Switching activity estimation for shift-and-add based constant multipliers. [Citation Graph (, )][DBLP ] Bit-level optimized FIR filter architectures for high-speed decimation applications. [Citation Graph (, )][DBLP ] Implementation of Polyphase Decomposed FIR Filters for Interpolation and Decimation Using Multiple Constant Multiplication Techniques. [Citation Graph (, )][DBLP ] Adjustable Fractional-Delay FIR Filters Using the Farrow Structure and Multirate Techniques. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.306secs