The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Giuseppe Scotti: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jacopo Giorgetti, Giuseppe Scotti, Andrea Simonetti, Alessandro Trifiletti
    Analysis of data dependence of leakage current in CMOS cryptographic hardware. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:78-83 [Conf]
  2. Manfred Josef Aigner, Stefan Mangard, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A novel CMOS logic style with data independent power consumption. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1066-1069 [Conf]
  3. Marco Balsi, Francesco Centurelli, Giuseppe Scotti, P. Tommasino, Alessandro Trifiletti
    An accurate behavioral model of phase detectors for clock recovery circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:636-639 [Conf]
  4. Francesco Centurelli, G. Lulli, Piero Marietti, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
    High-speed CMOS-to-ECL pad driver in 0.18µm CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:448-451 [Conf]
  5. Francesco Centurelli, Massimo Pozzoni, Giuseppe Scotti, Alessandro Trifiletti
    A high-speed low-voltage phase detector for clock recovery from NRZ data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:297-300 [Conf]
  6. Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti
    CMOS single-to-differential current amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2583-2586 [Conf]
  7. Mauro Olivieri, Mirko Scarana, Giuseppe Scotti, Alessandro Trifiletti
    Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:119-128 [Conf]
  8. Francesco Centurelli, A. Golfarelli, J. Guinea, L. Masini, D. Morigi, Massimo Pozzoni, Giuseppe Scotti, Alessandro Trifiletti
    A 10-Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:2, pp:191-200 [Journal]
  9. Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:630-638 [Journal]
  10. Christian Falconi, M. Cianella, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti
    Mismatch-tolerant, Continuous Time, Gain Enhanced Amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2204-2207 [Conf]
  11. Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti
    Low Voltage CMOS Current and Voltage References without Resistors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1907-1910 [Conf]
  12. Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Salvatore Pennisi
    Source-degenerated CMOS Transconductor with Auxiliary Linearization. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2240-2243 [Conf]
  13. Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti
    150 µA CMOS Transconductor with 82 dB SFDR. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:237-240 [Conf]
  14. Pietro Monsurrò, Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti
    Inverting closed-loop amplifier architecture with reduced gain error and high input impedance. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  15. Manfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti
    Side channel analysis resistant design flow. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  16. Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti
    Enhancing power analysis attacks against cryptographic devices. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  17. Marco Balsi, Francesco Centurelli, Piero Marietti, Giuseppe Scotti, P. Tommasino, Alessandro Trifiletti, G. Valente
    Validation of a statistical non-linear model of GaAs HEMT MMIC's by hypothesis testing and principal components analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  18. Francesco Centurelli, Luca Giancane, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti
    A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2007, pp:516-525 [Conf]

  19. 10-th order programmable low-pass CMOS integrated pulse-shaping filter. [Citation Graph (, )][DBLP]


  20. Mixed-signal flexible architecture for the synthesis of n-port networks. [Citation Graph (, )][DBLP]


  21. Low voltage, low power, compact, high accuracy, high precision PTAT temperature sensor for deep sub-micron CMOS systems. [Citation Graph (, )][DBLP]


  22. Dual op amp, LDO regulator with power supply gain suppression for CMOS smart sensors and microsystems. [Citation Graph (, )][DBLP]


  23. A gain-enhancing technique for very low-voltage amplifiers. [Citation Graph (, )][DBLP]


  24. Differential Capacitance Analysis. [Citation Graph (, )][DBLP]


Search in 0.104secs, Finished in 0.105secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002