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Publications of Author

1. Chittarsu Raghunandan, K. S. Sainarayanan, M. B. Srinivas
   Bus-encoding technique to reduce delay, power and simultaneous switching noise (SSN) in RLC interconnects. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:371-376 [Conf]
   
2. K. S. Sainarayanan, Chittarsu Raghunandan, M. B. Srinivas
   Delay and Power Minimization in VLSI Interconnects with Spatio-Temporal Bus-Encoding Scheme. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2007, pp:401-408 [Conf]
   
3. Chittarsu Raghunandan, K. S. Sainarayanan, M. B. Srinivas
   Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN). [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:1129-1132 [Conf]
   
4. 
   Process Variation Aware Bus-Coding Scheme for Delay Minimization in VLSI Interconnects. [Citation Graph (, )][DBLP]
   
   
5. 
   Bus encoding schemes for minimizing delay in VLSI interconnects. [Citation Graph (, )][DBLP]