The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Seid Mehdi Fakhraie: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Amin Farmahini Farahani, Mehdi Kamal, Seid Mehdi Fakhraie, Saeed Safari
    HW/SW partitioning using discrete particle swarm. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:359-364 [Conf]
  2. Mehrdad Najibi, M. Salehi, Ali Afzali-Kusha, Massoud Pedram, Seid Mehdi Fakhraie, Hossein Pedram
    Dynamic voltage and frequency management based on variable update intervals for frequency setting. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:755-760 [Conf]
  3. Mehdi Salmani Jelodar, Seid Mehdi Fakhraie, Majid Nili Ahmadabadi
    A New Approach for Training of Artificial Neural Networks using Population Based Incremental Learning (PBIL). [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Intelligence, 2004, pp:165-168 [Conf]
  4. G. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour
    eUTDSP: a design study of a new VLIW-based DSP architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:137-140 [Conf]
  5. Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha
    Systematic test program generation for SoC testing using embedded processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:541-544 [Conf]
  6. Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie
    An efficient BIST method for testing of embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:73-76 [Conf]
  7. H. Zarei, Omid Shoaei, Seid Mehdi Fakhraie
    A low-power fully integrated Gaussian-MSK modulator based on the sigma-delta fractional-N frequency synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:100-103 [Conf]
  8. G. R. Chaji, Seid Mehdi Fakhraie, K. C. Smith
    Pseudo dynamic logic (SDL): a high-speed and low-power dynamic logic family. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:245-248 [Conf]
  9. R. Rafati, A. Z. Charaki, G. R. Chaji, Seid Mehdi Fakhraie, K. C. Smith
    Comparison of a 17 b multiplier in Dual-rail domino and in Dual-rail D3L (D4L) logic styles. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2002, pp:257-260 [Conf]
  10. Seyed Reza Abdollahi, S. Kiaei, B. Bakkaloglu, Seid Mehdi Fakhraie, R. Anvari, S. E. Abdollahi
    An all-digital programmable digitally-controlled-oscillator (DCO) for digital wireless applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:101-104 [Conf]
  11. A. Pedram, M. R. Jamali, Seid Mehdi Fakhraie, Caro Lucas
    Reconfigurable Parallel Hardware for Computing Local Linear Neuro-Fuzzy Model. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:198-201 [Conf]
  12. Faezeh Montazeri, Mehdi Salmani Jelodar, S. Najmeh Fakhraie, Seid Mehdi Fakhraie
    Evolutionary Multiprocessor Task Scheduling. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:68-76 [Conf]
  13. A. Banaiyan, Seid Mehdi Fakhraie, H. R. Mahdiani
    Cost-Performance Co-Analysis in VLSI Implementation of Existing and New Defuzzification Methods. [Citation Graph (0, 0)][DBLP]
    CIMCA/IAWTIC, 2005, pp:828-833 [Conf]
  14. Saeed Shamshiri, Seid Mehdi Fakhraie
    Genetic-algorithm Memory Minimisation for Designing Reconfigurable Ip Address Lookup Engine. [Citation Graph (0, 0)][DBLP]
    International Journal of Computational Intelligence and Applications, 2005, v:5, n:1, pp:69-90 [Journal]
  15. Amir Agah, Seid Mehdi Fakhraie, Azita Emami-Neyestanak
    Tertiary-Tree 12-GHz 32-bit Adder in 65nm Technology. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3006-3009 [Conf]
  16. F. Kashfi, Seid Mehdi Fakhraie
    Implementation of a high-speed low-power 32-bit adder in 70nm technology. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  17. Hadi Esmaeilzadeh, Pooya Saeedi, Babak Nadjar Araabi, Caro Lucas, Seid Mehdi Fakhraie
    Neural network stream processing core (NnSP) for embedded systems. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  18. H. R. Mahdiani, A. Banaiyan, Seid Mehdi Fakhraie
    Hardware implementation and comparison of new defuzzification techniques in fuzzy processors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  19. S. M. Mortazavi Zanjani, S. Rahimian Omam, Seid Mehdi Fakhraie, Omid Shoaei
    Experimental Evaluation of Different Realizations of Recursive CIC Filters. [Citation Graph (0, 0)][DBLP]
    CCECE, 2006, pp:1056-1059 [Conf]

  20. Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence. [Citation Graph (, )][DBLP]


  21. A New Search Space Reduction Technique for Acquisition of UWB Signals in Multipath Channels. [Citation Graph (, )][DBLP]


  22. Digital Audio Broadcasting System Modeling and Hardware Implementation. [Citation Graph (, )][DBLP]


  23. A Novel Neural Network GA-Optimized Controller for QoS Support in Wireless MACs. [Citation Graph (, )][DBLP]


  24. Rapid Acquisition of Ultra-Wideband Signals in Multipath Environments. [Citation Graph (, )][DBLP]


  25. Digital Network Echo Cancellation Using Genetic Algorithm and Combined GA-LMS Method. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.305secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002