The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Michael Katelman: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sam Kamin, Baris Aktemur, Michael Katelman
    Staging static analyses for program generation. [Citation Graph (0, 0)][DBLP]
    GPCE, 2006, pp:1-10 [Conf]
  2. Michael Katelman, José Meseguer
    A Rewriting Semantics for ABEL with Applications to Hardware/Software Co-Design and Analysis. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:176, n:4, pp:47-60 [Journal]

  3. Getting Formal Verification into Design Flow. [Citation Graph (, )][DBLP]


  4. Redesign of the LMST Wireless Sensor Protocol through Formal Modeling and Statistical Model Checking. [Citation Graph (, )][DBLP]


  5. Directed-Logical Testing for Functional Verification of Microprocessors. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002